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74AUP2G86DC,125 AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

74AUP2G86DC,125 product

74AUP2G86DC,125

Logic

XOR GateLogic ICLow Power

The 74AUP2G86 is a low-power dual 2-input XOR gate designed for wide supply voltage ranges (0.8V to 3.6V) with high noise immunity.

Best for

  • Low-power portable electronics
  • Battery-operated systems

Avoid if

  • High-speed applications requiring sub-nanosecond delays

Check before use

  • Input voltage levels
  • Operating temperature range

Key specifications

Supply Voltage
0.8 V to 3.6 V
Logic Function
XOR
Propagation Delay
7.1 ns (max @ 3.3V)

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8542.39.0001

Application

General Logic

Datasheet

NXP-Semiconductors-company-13.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for 74AUP2G86DC,125: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual 2-input EXCLUSIVE-OR gate from Nexperia's AUP (Advanced Ultra-low Power) logic family.