ProjectsPricingInsights

74HC112D AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

74HC112D product

74HC112D

Interface

Flip-FlopLogic ICCMOS

The 74HC112D is a dual JK flip-flop with asynchronous set and reset, designed for high-speed CMOS logic applications.

Best for

  • General logic control
  • State machine design

Avoid if

  • High-speed applications exceeding 70 MHz

Check before use

  • Timing constraints for set-up and hold

Key specifications

Logic Family
74HC
Supply Voltage
2V to 6V
Max Clock Frequency
71 MHz

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8542.39.0001

Application

General Logic

Datasheet

7c4348fcef8e43ff74786af7b5af6f49_1808301824_Nexperia-74HC112D_C8167.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for 74HC112D: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
Get Files
PCB Footprint
Land pattern for PCB layout
Get Files
3D Model
STEP file for mechanical design
Get Files
KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
Generate library

Login required · CAD models billed separately as an add-on

Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual JK flip-flop IC with negative-edge triggering, featuring independent set and reset inputs for each flip-flop.