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74HC238PW,118 AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

74HC238PW,118 product

74HC238PW,118

Programmers

DecoderDemultiplexerLogic IC

The 74HC238 is a high-speed CMOS 3-to-8 line decoder/demultiplexer designed for memory chip select decoding and general signal routing.

Best for

  • Memory chip select decoding
  • Parallel expansion to 1-of-32 decoder

Avoid if

  • TTL logic levels are required (use 74HCT238 instead)

Check before use

  • Enable input logic levels (E1, E2 active LOW, E3 active HIGH)

Key specifications

Supply Voltage
2.0 V to 6.0 V
Logic Family
74HC (CMOS)
Operating Temp
-40 °C to +125 °C
Package
16-TSSOP

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8542.39.0001

Application

Memory DecodingSignal Routing

Datasheet

NXP-Semiconductors-company-13.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for 74HC238PW,118: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a 3-to-8 line decoder/demultiplexer that converts three binary address inputs into one of eight mutually exclusive active-HIGH outputs.