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74LVC2G00GT,115 AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

74LVC2G00GT,115 product

74LVC2G00GT,115

Logic

Logic GateNANDNexperia74LVC

The 74LVC2G00GT is a dual 2-input NAND gate designed for mixed-voltage logic applications, featuring Schmitt-trigger inputs and partial power-down protection.

Best for

  • Mixed-voltage logic translation
  • Low-power digital circuits

Avoid if

  • High-current drive requirements exceeding 32 mA

Check before use

  • Input voltage levels
  • Thermal derating for the XSON8 package

Key specifications

Logic Type
NAND Gate
Supply Voltage
1.65 V - 5.5 V
Operating Temp
-40 °C to +125 °C

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8542.39.0001

Application

General Logic

Datasheet

NXP-Semiconductors-company-13.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for 74LVC2G00GT,115: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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Verified KiCad 8 symbol, footprint, and 3D model
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual 2-input NAND gate from Nexperia, optimized for low-power CMOS applications and mixed 3.3 V/5 V logic environments.