74LVC2G34GW,125 Datasheet, Specs, Alternatives & ECAD | Nexperia USA Inc. | PartGenie

AI summary

74LVC2G34GW,125 product

The 74LVC2G34 is a dual non-inverting buffer gate designed for mixed-voltage environments (3.3 V/5 V) with integrated Schmitt-trigger inputs for noise immunity.

Best for

Mixed-voltage logic level translation
Signal buffering in noisy environments

Avoid if

Applications requiring high-current drive beyond 24 mA

Check before use

Thermal derating limits for the SOT363-2 package

Key specifications

Supply Voltage: 1.65 V to 5.5 V
Output Drive: ±24 mA (at 3.0 V)
Operating Temp: -40 °C to +125 °C

Compliance & Environment

RoHS: ROHS3 Compliant
REACH: REACH Unaffected
MSL: 1 (Unlimited)
ECCN: EAR99
HTSUS: 8542.39.0001

Application

General LogicIndustrial

Datasheet

NXP-Semiconductors-company-13.pdf

800 KB

CAD Models

Download ECAD models for 74LVC2G34GW,125: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol

Schematic symbol for your EDA tool

PCB Footprint

Land pattern for PCB layout

3D Model

STEP file for mechanical design

KiCad Library

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Alternative components

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Design and risk insights

Questions & answers

It is a dual non-inverting buffer gate that supports supply voltages from 1.65 V to 5.5 V, suitable for level translation in mixed-voltage systems.