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74VHC138FT(BJ) AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

74VHC138FT(BJ) product

74VHC138FT(BJ)

Decoders

DecoderCMOSLogic

The 74VHC138FT is a high-speed CMOS 3-to-8 line decoder designed for memory address decoding and general logic applications.

Best for

  • Memory address decoding
  • High-speed logic systems

Avoid if

  • Applications requiring non-standard logic levels

Check before use

  • Ensure unused inputs are tied to VCC or GND

Key specifications

Supply Voltage
2.0 V to 5.5 V
Propagation Delay
5.7 ns
Temp Range
-40 °C to 125 °C

Compliance & Environment

RoHS
-
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

IndustrialGeneral Logic

Datasheet

74VHC138FT(BJ)-Toshiba-datasheet-113431855.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for 74VHC138FT(BJ): KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

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PCB Footprint
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3D Model
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is an advanced high-speed CMOS 3-to-8 line decoder that uses silicon gate C2MOS technology.