ProjectsPricingInsights

B40B-PUDSS-1(LF)(SN) AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

B40B-PUDSS-1(LF)(SN) product

B40B-PUDSS-1(LF)(SN)

Interconnects

JSTPUD SeriesHeader2.0mm Pitch

The B40B-PUDSS-1(LF)(SN) is a 40-pin, 2.0mm pitch double-row shrouded header from JST's PUD series, designed for secure board-to-wire connections.

Best for

  • Board-to-wire connections
  • Vibration-resistant applications

Avoid if

  • High-temperature environments exceeding 85°C

Check before use

  • PCB layout requirements
  • Mating receptacle compatibility

Key specifications

Positions
40
Pitch
2.0 mm
Current Rating
3 A

Compliance & Environment

RoHS
RoHS2 Compliant
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

Industrial ElectronicsGeneral Connectivity

Datasheet

B40B-PUDSS-1(LF)(SN)-JST-datasheet-12395095.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for B40B-PUDSS-1(LF)(SN): KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
Get Files
PCB Footprint
Land pattern for PCB layout
Get Files
3D Model
STEP file for mechanical design
Get Files
KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
Generate library

Login required · CAD models billed separately as an add-on

Alternative components

2
PartDetailsMatch
2543U-220CNG1SNT01Manufacturer

Review required

Review required

Design and risk insights

Questions & answers

It is a 40-position, 2.0 mm pitch, double-row shrouded header connector from JST, featuring a secure locking mechanism for board-to-wire applications.