For BusinessPricing
Request a demo

CD4040BNSR AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

CD4040BNSR product

CD4040BNSR

Counters

CMOS counter12-stage dividerbinary ripple counterSOP-163 V to 18 V

CD4040BNSR is a 12-stage CMOS binary ripple counter/divider for frequency division, timing, and control-counting functions. It supports 3 V to 18 V operation and is supplied in a 16-pin SOP package.

Best for

  • Binary frequency division
  • Timer and delay circuits
  • Low-power CMOS control counters

Avoid if

  • Applications requiring all count outputs to change synchronously
  • Clock inputs exceeding the applicable supply-voltage frequency rating

Check before use

  • Use the correct 16-pin SOP-16 NS footprint
  • Allow for cumulative ripple delay between counter stages
  • Confirm reset timing and output-current requirements

Key specifications

Counter
12-stage binary ripple counter
Supply range
3 V to 18 V
Maximum clock frequency
12 MHz at VDD = 15 V
Package
16-pin SOP (NS)

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
-
MSL
Level-1-260C-UNLIM
ECCN
-
HTSUS
-

Application

Frequency divisionTimers and time delaysIndustrial control counters

Datasheet

Texas-Instruments-company-64.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for CD4040BNSR: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
Get Files
PCB Footprint
Land pattern for PCB layout
Get Files
3D Model
STEP file for mechanical design
Get Files
KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
Generate library

Login required · CAD models billed separately as an add-on

Where to Buy

Real-time and catalog pricing from verified distributors

Live prices updated on demand · Catalog (~) prices may differ

Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

CD4040BNSR is a Texas Instruments CD4040B 12-stage CMOS ripple-carry binary counter/divider. It provides buffered binary outputs, an input-pulse clock, and a common asynchronous reset.