CDCM61002RHBT AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

CDCM61002RHBT product

CDCM61002RHBT

Integrated Circuits (ICs)

clock generatorPLLintegrated VCOLVPECLLVDSLVCMOS32-VQFN

CDCM61002RHBT is a 3.3 V, pin-configurable two-output clock synthesizer with an integrated low-noise VCO and selectable LVPECL, LVDS, or LVCMOS outputs.

Best for

  • Low-jitter datacom clock generation
  • Pin-configured LVPECL or LVDS clock distribution
  • High-frequency crystal oscillator replacement

Avoid if

  • A serially programmable clock device is required
  • The reference clock is outside 21.875 MHz to 28.47 MHz
  • More than one independently divided output frequency is required

Check before use

  • Prescaler, feedback, and output-divider pin states
  • LVPECL, LVDS, or LVCMOS termination
  • RSTN timing and reference stability
  • Thermal-pad and power-supply layout

Key specifications

Input frequency
21.875 MHz to 28.47 MHz
VCO range
1.75 GHz to 2.05 GHz
Output range
43.75 MHz to 683.264 MHz
Output standards
LVPECL, LVDS, or 2 × LVCMOS

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
-
MSL
Level-2-260C-1 YEAR
ECCN
-
HTSUS
-

Application

SONET and Ethernet clockingFibre Channel and Serial ATAIndustrial clock generation

CAD Models

Download ECAD models for CDCM61002RHBT: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a two-output low-jitter clock generator from Texas Instruments. It combines a PLL, a 1.75 GHz to 2.05 GHz VCO, programmable dividers, and output buffers selectable as LVPECL, LVDS, or two LVCMOS signals per output pair.