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CLVC1G125IDCKREP AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

CLVC1G125IDCKREP product

CLVC1G125IDCKREP

Buffers

Buffer3-StateLogic

The SN74LVC1G125-EP is a single-bit, non-inverting bus buffer gate with a 3-state output, optimized for 1.65V to 5.5V logic systems.

Best for

  • Bus isolation
  • Signal buffering
  • Partial-power-down applications

Avoid if

  • High-speed differential signaling requirements

Check before use

  • OE pin pull-up resistor value for power-up/down stability

Key specifications

Supply Voltage
1.65V - 5.5V
Propagation Delay
3.7ns
Output Drive
±24mA

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
Compliant
MSL
Level-1-260C-UNLIM
ECCN
EAR99
HTSUS
8542.39.0000

Application

General LogicIndustrial

Datasheet

Texas-Instruments-company-64.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for CLVC1G125IDCKREP: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

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3D Model
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a single-channel bus buffer gate with a 3-state output, designed for high-performance logic applications requiring partial-power-down protection.