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DTC115EM3T5G AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

DTC115EM3T5G product

DTC115EM3T5G

Pre-Biased

NPNDigital TransistorPre-BiasedSOT-723

The DTC115EM3T5G is an NPN pre-biased digital transistor with integrated 100k/100k resistors, ideal for space-constrained switching applications.

Best for

  • Space-constrained switching
  • Digital logic interfacing

Avoid if

  • High-power applications exceeding 100mA

Check before use

  • Thermal dissipation limits in high-density layouts

Key specifications

VCEO
50 V
IC
100 mA
R1/R2
100 kΩ / 100 kΩ

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8541.21.0095

Application

General Switching

Datasheet

ON-Semiconductor-company-79.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for DTC115EM3T5G: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is an NPN digital transistor (BRT) that integrates a monolithic bias resistor network (R1=100kΩ, R2=100kΩ) into a single SOT-723 package.