EM639325TS-6G AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

EM639325TS-6G product

EM639325TS-6G

Memory

SDR SDRAM128 Mbit4M × 32-bit166 MHz3.3 VTSOP II

EM639325TS-6G is a 128 Mbit, 4M × 32-bit SDR SDRAM for 3.3 V LVTTL memory buses, rated for up to 166 MHz in an 86-pin TSOP II package.

Best for

  • Existing 3.3 V SDR SDRAM designs
  • 32-bit memory buses requiring four-bank SDRAM organization

Avoid if

  • New designs requiring DDR-family memory interfaces
  • Applications requiring confirmed lifecycle or compliance declarations

Check before use

  • Set the mode register after power-up
  • Meet 18 ns minimum tRCD and tRP for the -6 grade
  • Validate package footprint and thermal/mechanical constraints

Key specifications

Density
128 Mbit
Organization
4M × 32-bit; 4 banks
Clock Rate
166 MHz maximum
Supply
3.3 V ±0.3 V
Package
86-pin TSOP II

Compliance & Environment

RoHS
-
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

Embedded SDRAM memory busesHigh-bandwidth digital systems

CAD Models

Download ECAD models for EM639325TS-6G: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

EM639325TS-6G is an ETRON 128 Mbit synchronous DRAM. It is organized as four 1M × 32-bit banks and uses a 32-bit data bus.