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LDTB113ZLT1G AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

LDTB113ZLT1G product

LDTB113ZLT1G

Transistors - BJT - Arrays Pre-Biased

PNPPre-BiasedSOT-23

The LDTB113ZLT1G is a PNP pre-biased transistor in a SOT-23 package, ideal for space-saving inverter and driver circuits.

Best for

  • Inverter circuits
  • Interface applications
  • Driver stages

Avoid if

  • High-power applications exceeding 200mW dissipation

Check before use

  • Input voltage limits

Key specifications

Transistor Type
PNP Pre-Biased
R1 / R2
1kΩ / 10kΩ
Max Collector Current
-500mA

Compliance & Environment

RoHS
Compliant
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

General SwitchingIndustrial Drivers

Datasheet

2de45f79c980d17eb69e92f42090fd56_2212131909_LRC-LDTB113ZLT1G_C5273231.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for LDTB113ZLT1G: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a PNP silicon surface mount transistor with an integrated monolithic bias resistor network, designed to simplify circuit design by eliminating external input resistors.