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LMUN5232DW1T1G AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

LMUN5232DW1T1G product

LMUN5232DW1T1G

Transistors - BJT - Arrays

Dual NPNPre-biasedSOT-363

The LMUN5232DW1T1G is a dual NPN pre-biased transistor in a compact SOT-363 package, featuring integrated 4.7kΩ/4.7kΩ resistors.

Best for

  • Space-constrained digital switching
  • Interface circuits

Avoid if

  • High-power applications exceeding 100mA
  • Applications requiring custom bias networks

Check before use

  • Thermal dissipation limits
  • Input voltage range

Key specifications

Resistor R1
4.7 kΩ
Resistor R2
4.7 kΩ
VCEO
50 V
Package
SOT-363

Compliance & Environment

RoHS
Compliant
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

General SwitchingConsumer Electronics

Datasheet

883138ac2fb7c4e86995af0f0ae53592_2212131909_LRC-LMUN5232DW1T1G_C5273166.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for LMUN5232DW1T1G: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual NPN Bias Resistor Transistor (BRT) that integrates two transistors and their associated bias resistors into a single SOT-363 package.