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NSBC114EDXV6T1G AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

NSBC114EDXV6T1G product

NSBC114EDXV6T1G

Pre-Biased

Dual NPNPre-BiasedSOT-563

The NSBC114EDXV6T1G is a dual NPN pre-biased transistor featuring integrated 10kΩ resistors, housed in a compact SOT-563 package.

Best for

  • Digital switching
  • Interface circuits
  • Space-constrained applications

Avoid if

  • High-power amplification
  • Applications requiring independent transistor control beyond the integrated bias network

Check before use

  • Thermal dissipation limits
  • Input voltage levels

Key specifications

Resistor Ratio
1.0
VCE(sat)
0.25 V max
Package
SOT-563

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8541.21.0095

Application

General

Datasheet

DTC114ED-D.PDF

800 KB

Datasheet AI

CAD Models

Download ECAD models for NSBC114EDXV6T1G: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual NPN Bias Resistor Transistor (BRT) that integrates two transistors and a monolithic bias network (10kΩ series and 10kΩ base-emitter resistors) into a single SOT-563 package.