PDWL050019 Datasheet, Specs, Alternatives & ECAD | UMW | PartGenie

AI summary

PDWL050019 product

The PDWL050019 is a 4-line low-capacitance TVS array in a SOT23-6 package, ideal for protecting high-speed data lines from ESD and surge events.

Best for

USB 2.0/3.0 data lines
Ethernet ports
DVI interfaces

Avoid if

Signal lines exceeding 5V operating voltage

Check before use

Clamping voltage compatibility with protected ICs

Key specifications

Lines Protected: 4
Working Voltage: 5 V
Peak Pulse Power: 150 W
Capacitance: 0.8 pF

Compliance & Environment

RoHS: -
REACH: -
MSL: -
ECCN: -
HTSUS: -

Application

ConnectivityConsumer Electronics

Datasheet

f874797319b1c7b0ae2b71655c79a12e_2212021230_Leiditech-PDWL050019_C5289067.pdf

800 KB

CAD Models

Download ECAD models for PDWL050019: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol

Schematic symbol for your EDA tool

PCB Footprint

Land pattern for PCB layout

3D Model

STEP file for mechanical design

KiCad Library

Verified KiCad 8 symbol, footprint, and 3D model

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a 4-line transient voltage suppressor (TVS) array designed to protect sensitive data lines from ESD and surge pulses.