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PUMD12,115 AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

PUMD12,115 product

PUMD12,115

Power Management (PMIC)

Dual TransistorPre-BiasedSOT363

The PUMD12 is a dual NPN/PNP pre-biased transistor (RET) in a SOT363 package, ideal for space-constrained digital switching applications.

Best for

  • Digital switching
  • Peripheral driving
  • IC input control

Avoid if

  • High-power applications exceeding 300mW

Check before use

  • Bias resistor compatibility

Key specifications

Configuration
1 NPN, 1 PNP
Bias Resistors
47kΩ / 47kΩ
Max Voltage
50V

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8541.21.0095

Application

AutomotiveIndustrial

Datasheet

NXP-Semiconductors-company-12.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for PUMD12,115: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Where to Buy

Real-time and catalog pricing from verified distributors

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

The PUMD12 is a dual resistor-equipped transistor (RET) containing one NPN and one PNP transistor in a single SOT363 package.