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PUMH10,115 AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

PUMH10,115 product

PUMH10,115

Power Management (PMIC)

NPNRETDual TransistorSOT363

The PUMH10 is a dual NPN resistor-equipped transistor (RET) designed for space-constrained digital applications.

Best for

  • Peripheral driving
  • IC input control
  • Digital logic switching

Avoid if

  • High-power switching applications exceeding 100mA
  • Applications requiring adjustable bias

Check before use

  • Thermal derating curve
  • Input voltage thresholds

Key specifications

VCEO (Max)
50 V
IO (Max)
100 mA
R1
2.2 kΩ
R2
47 kΩ

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
REACH Unaffected
MSL
1 (Unlimited)
ECCN
EAR99
HTSUS
8541.21.0095

Application

GeneralIndustrial

Datasheet

NXP-Semiconductors-company-13.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for PUMH10,115: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

The PUMH10 is a dual NPN resistor-equipped transistor (RET) in a SOT363 package, featuring integrated bias resistors (R1=2.2kΩ, R2=47kΩ) to simplify circuit design.