ProjectsPricingInsights

SN74F126DR AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

SN74F126DR product

SN74F126DR

Buffers

Buffer3-State5V Logic

The SN74F126DR is a high-speed quadruple bus buffer gate with 3-state outputs, designed for 5V logic systems.

Best for

  • Bus driving
  • Memory address buffering

Avoid if

  • Low-voltage logic systems (e.g., 3.3V)

Check before use

  • OE pin termination requirements

Key specifications

Supply Voltage
4.5V to 5.5V
Max Propagation Delay
6.5ns
Output Current (IOL)
64mA

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
-
MSL
Level-1-260C-UNLIM
ECCN
-
HTSUS
-

Application

General Logic

Datasheet

Texas-Instruments-company-64.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for SN74F126DR: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
Get Files
PCB Footprint
Land pattern for PCB layout
Get Files
3D Model
STEP file for mechanical design
Get Files
KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
Generate library

Login required · CAD models billed separately as an add-on

Where to Buy

Real-time and catalog pricing from verified distributors

Live prices updated on demand · Catalog (~) prices may differ

Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a quadruple bus buffer gate with independent 3-state outputs, commonly used for driving bus lines or memory address registers.