For BusinessPricing
Request a demo

SN74HCS86BQAR AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

SN74HCS86BQAR product

SN74HCS86BQAR

Gates and Inverters

XOR gateSchmitt triggerCMOS logicWQFN-142 V to 6 V

SN74HCS86BQAR is a quad XOR gate for 2 V to 6 V logic systems where Schmitt-trigger inputs help tolerate slow or noisy signals.

Best for

  • XOR logic functions
  • Phase-difference detection
  • Slow or noisy CMOS-level signals

Avoid if

  • A supply voltage outside 2 V to 6 V is required
  • Open-drain output behavior is required
  • The design cannot accommodate a 0.5 mm-pitch WQFN package

Check before use

  • Verify switching thresholds at the operating VCC.
  • Keep output capacitive loading near or below 50 pF for specified switching performance.
  • Terminate all unused inputs.

Key specifications

Logic function
Four 2-input XOR gates
Input architecture
CMOS Schmitt-trigger
Supply range
2 V to 6 V
Package
14-pin WQFN, 3.0 mm × 2.5 mm nominal
Temperature range
-40 °C to +125 °C

Compliance & Environment

RoHS
Not applicable
REACH
-
MSL
Level-1-260C-UNLIM
ECCN
-
HTSUS
-

Application

Phase and clock comparisonNoise-tolerant digital logic

Datasheet

poYBAGHC0mOAOJ_5ACQxrBxkqNo082.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for SN74HCS86BQAR: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
Get Files
PCB Footprint
Land pattern for PCB layout
Get Files
3D Model
STEP file for mechanical design
Get Files
KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
Generate library

Login required · CAD models billed separately as an add-on

Where to Buy

Real-time and catalog pricing from verified distributors

Live prices updated on demand · Catalog (~) prices may differ

Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

SN74HCS86BQAR is a Texas Instruments CMOS logic IC containing four independent 2-input XOR gates. Each channel implements Y = A ⊕ B and has Schmitt-trigger inputs.