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SN74LS112AN(LX) AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

SN74LS112AN(LX) product

SN74LS112AN(LX)

Logic - Flip Flops

LogicFlip-FlopJK

The SN74LS112AN is a dual JK flip-flop with negative-edge triggering, designed for reliable logic operations in a wide temperature range.

Best for

  • Digital logic design
  • State machine implementation

Avoid if

  • High-speed applications exceeding frequency limits

Check before use

  • Pinout compatibility and logic levels

Key specifications

Supply Voltage
2V - 6V
Triggering
Negative-edge
Temp Range
-40°C to +125°C

Compliance & Environment

RoHS
-
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

General Logic

Datasheet

f6aee18d68027c81f40ebe833f8da151_2404171646_lingxingic-SN74LS112AN-LX_C22384770.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for SN74LS112AN(LX): KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual JK flip-flop integrated circuit that triggers on the negative edge of the clock signal.