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SN74LS112ANSR AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

SN74LS112ANSR product

SN74LS112ANSR

Flip Flops

LogicFlip-FlopTI

The SN74LS112ANSR is a dual J-K negative-edge-triggered flip-flop with preset and clear inputs, designed for high-speed logic applications.

Best for

  • Digital logic design
  • Counters
  • Shift registers

Avoid if

  • High-voltage applications
  • Positive-edge triggering requirements

Check before use

  • Clock signal edge requirements
  • Operating temperature range

Key specifications

Function
J-K Flip-Flop
Trigger
Negative Edge
Supply Voltage
4.75V - 5.25V

Compliance & Environment

RoHS
ROHS3 Compliant
REACH
-
MSL
Level-1-260C-UNLIM
ECCN
-
HTSUS
-

Application

General Logic

Datasheet

Texas-Instruments-company-64.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for SN74LS112ANSR: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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Where to Buy

Real-time and catalog pricing from verified distributors

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a dual J-K negative-edge-triggered flip-flop with individual preset and clear inputs, manufactured by Texas Instruments.