ProjectsPricingInsights

SN74LS280DR(LX) AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

SN74LS280DR(LX) product

SN74LS280DR(LX)

Logic - Parity Generators and Checkers

LogicParityError Detection

The SN74LS280DR is a 9-bit parity generator/checker designed for error detection in digital systems.

Best for

  • Error detection in data buses

Avoid if

  • Applications requiring high-speed parity calculation beyond the specified propagation delay

Check before use

  • Supply voltage levels and temperature range

Key specifications

Function
9-bit Parity Generator/Checker
Supply Voltage
2.0V to 6.0V
Temp Range
-40°C to +125°C
Package
SOP14

Compliance & Environment

RoHS
-
REACH
-
MSL
-
ECCN
-
HTSUS
-

Application

General Logic

Datasheet

f3d0dfc97455c0dd3b9c5f67d683e4ab_2406141143_lingxingic-SN74LS280DR_C22466292.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for SN74LS280DR(LX): KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
Get Files
PCB Footprint
Land pattern for PCB layout
Get Files
3D Model
STEP file for mechanical design
Get Files
KiCad Library
Verified KiCad 8 symbol, footprint, and 3D model
Generate library

Login required · CAD models billed separately as an add-on

Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a 9-bit parity generator/checker that outputs even or odd parity based on the number of HIGH inputs.