SN74LVC1G125DRYR(UMW) Datasheet, Specs, Alternatives & ECAD | UMW | PartGenie

AI summary

SN74LVC1G125DRYR(UMW) product

The SN74LVC1G125 is a single-bit non-inverting buffer with a 3-state output, suitable for level shifting and signal buffering in 1.65V to 5.5V systems.

Best for

Signal buffering
Level translation
Bus isolation

Avoid if

High-speed differential signaling
Applications requiring more than one buffer per package

Check before use

OE input logic level
Supply voltage range

Key specifications

Supply Voltage: 1.65V to 5.5V
Output Drive: 24mA
Logic Type: Non-inverting Buffer
Package: DFN6

Compliance & Environment

RoHS: Compliant
REACH: -
MSL: Level 1
ECCN: -
HTSUS: -

Application

General Logic

Datasheet

6ed9a6375131a5f2c43d173a5ffe6c91_2311091745_UMW-Youtai-Semiconductor-Co---Ltd--SN74LVC1G125DRYR-UMW_C7598677.pdf

800 KB

CAD Models

Download ECAD models for SN74LVC1G125DRYR(UMW): KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol

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PCB Footprint

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3D Model

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Alternative components

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Design and risk insights

Questions & answers

It is a high-performance CMOS non-inverting buffer with a 3-state output, designed for wide-range supply voltages (1.65V to 5.5V).