It is a normally-off SiC FET device using a cascode configuration, combining a SiC JFET and a Si MOSFET to provide high-voltage blocking with standard gate-drive compatibility.
UJ3C120080K3S AI Analysis:
Datasheet, Specs, Alternatives & ECAD
AI summary
Key specifications
- VDS
- 1200 V
- RDS(on)
- 80 mΩ
- ID
- 33 A
- TJ,max
- 175 °C
Compliance & Environment
- RoHS
- Y
- REACH
- -
- MSL
- -
- ECCN
- EAR99
- HTSUS
- 8541290095.0
Application
Power ConversionIndustrial
Datasheet
CAD Models
Download ECAD models for UJ3C120080K3S: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.
EDA Symbol
Schematic symbol for your EDA tool
PCB Footprint
Land pattern for PCB layout
3D Model
STEP file for mechanical design
KiCad Library
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Alternative components
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