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XC95144XL-10TQG100C AI Analysis:
Datasheet, Specs, Alternatives & ECAD

AI summary

XC95144XL-10TQG100C product

XC95144XL-10TQG100C

Programmers

CPLD3.3VXilinx144 Macrocells

The XC95144XL-10TQG100C is a 3.3V CPLD featuring 144 macrocells and 3,200 usable gates, designed for high-performance, low-voltage applications.

Best for

  • Communication systems
  • Computing systems

Avoid if

  • Applications requiring extended industrial temperature ranges

Check before use

  • Power supply stability and thermal constraints

Key specifications

Macrocells
144
Usable Gates
3200
Max Delay
10 ns
I/O Pins
81

Compliance & Environment

RoHS
Y
REACH
-
MSL
-
ECCN
EAR99
HTSUS
8542390001.0

Application

CommunicationsComputing

Datasheet

XC95144XL-10TQG100C-Xilinx-datasheet-48051294.pdf

800 KB

Datasheet AI

CAD Models

Download ECAD models for XC95144XL-10TQG100C: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.

EDA Symbol
Schematic symbol for your EDA tool
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PCB Footprint
Land pattern for PCB layout
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3D Model
STEP file for mechanical design
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KiCad Library
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Where to Buy

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Alternative components

Alternatives are being enriched. Analyze this part in PartGenie for the latest matches.

Design and risk insights

Questions & answers

It is a high-performance 3.3V CPLD from Xilinx, containing 144 macrocells and 3,200 usable gates, housed in a 100-pin TQFP package.