The ZVNL120A is an N-channel enhancement mode vertical DMOS FET with a 200V drain-source breakdown voltage, suitable for small-signal switching.
ZVNL120A AI Analysis:
Datasheet, Specs, Alternatives & ECAD
AI summary
Key specifications
- VDS
- 200 V
- ID
- 180 mA
- RDS(on)
- 10 Ohm
Compliance & Environment
- RoHS
- ROHS3 Compliant
- REACH
- -
- MSL
- -
- ECCN
- EAR99
- HTSUS
- 8541210095.0
Application
Telephone handsets
Datasheet
CAD Models
Download ECAD models for ZVNL120A: KiCad symbol & footprint, Altium footprint, PCB footprint, and 3D model.
EDA Symbol
Schematic symbol for your EDA tool
PCB Footprint
Land pattern for PCB layout
3D Model
STEP file for mechanical design
KiCad Library
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Alternative components
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